In general, a semiconductor memory device is designed to operate with an external voltage (VDD). The voltage level of an external voltage (VDD) supplied to a semiconductor memory device would rise from 0 V to a target voltage level at a predetermined slope. This could cause malfunction when an external voltage (VDD) is supplied directly to a semiconductor memory device.
Therefore, a semiconductor memory device includes a power-up signal generation circuit which performs an initialization operation during a period of which an external voltage (VDD) rises up to a target voltage level and thereafter enables the semiconductor memory device to operate with the external voltage (VDD) after the external voltage (VDD) rises up to the target voltage level. The power-up signal generation circuit generates a power-up signal, which changes from a low level to a high level (or from a high level to a low level in some embodiments) after the completion of the “power-up period” during which the external voltage (VDD) rises up to the target voltage level. After the power-up signal generated from the power-up signal generation circuit changes to a high level, the semiconductor memory device completes the initialization operation and starts a normal operation.
For a MOS transistor in a semiconductor memory device, its threshold voltage would rise for lower inside temperature of the semiconductor memory device, and, for situations like this, a higher level external voltage (VDD) must be supplied to the MOS transistor. This means that the level transition of power-up signal from low to high must be performed at a higher voltage level of the external voltage VDD for lower inside temperature of the semiconductor memory device.
Meanwhile, the threshold voltage of the MOS transistor would be lowered when the inside temperature of the semiconductor memory device becomes higher. Hence, the level transition of the power-up signal from low to high must be performed at a lower voltage level of the external voltage (VDD) as the inside temperature of the semiconductor device becomes lower. However, the low to high level transition of the power-up signal at a lower voltage level of the external voltage (VDD) when the inside temperature of the semiconductor memory device is high could cause malfunction to the initialization operation of the semiconductor memory device such that the initialization operation cannot be correctly performed.